What view in a debugger displays the order in which functions were called?

A. The Call Stack view

B. The Memory view

C. The Registers view

D. The Variables view

A Just-In-Time compiler writes instructions to a region of memory that is configured using a writeback cache strategy. For the locations that have been written, what is the MINIMUM cache maintenance that MUST be performed before the new instructions can be reliably executed?

A. Instruction cache clean only

B. Instruction cache invalidate only

C. Data cache clean and instruction cache invalidate

D. Data cache invalidate and instruction cache invalidate

Which ARMv7 instructions are recommended to implement a semaphore?

A. SWP, SWPB

B. TEQ, TST

C. STC, SBC

D. LDREX, STREX

Which TWO of the following accurately describe constraints on the location of the Tightly Coupled Memory (TCM) regions in a Cortex-R4 processor? (Choose two)

A. TCM Region A (ATCM) must be at a lower memory address than TCM Region B (BTCM)

B. TCM Region A can only be located at address 0x0

C. Both TCM regions must be placed at addresses which are aligned to their size

D. The two TCM regions may not overlap

E. TCM Region B (BTCM) must be located immediately above TCM Region A (ATCM)

When timing a critical function for an algorithm, using platform time functions such as get time of day (), the result is unpredictable; there is significant variance in the measured time between different runs of the benchmark. Which of the following strategies would improve the accuracy of the measurement?

A. Time multiple executions of the algorithm and average the result

B. Break the algorithm into smaller pieces and time them individually

C. Run the code on a software model of the platform and collect the results on that system

D. Add some code with a known overhead to the algorithm to make it run slower, and remove the overhead afterwards

Literal pool loads to access constants at run-time can be minimized by:

A. Ensuring constants can be encoded as immediates in the current instruction set.

B. Storing the code in ROM.

C. Using Thumb code rather than ARM code.

D. Compiling and linking as position-independent code.

The Memory Protection Unit (MPU) of Cortex-R4 performs which of the following tasks?

A. Translates virtual addresses to physical addresses

B. Generates parity information to detect soft errors in memory

C. Performs access permission checks

D. Permits the system to be divided into secure and normal worlds, through the use of ARM's TrustZone technology

An external debugger would need to clean the contents of the processor data cache in which of the following cases?

A. When it changes the contents of ARM registers (r0-r15)

B. When it displays the contents of an area of cacheable data

C. When it displays the contents of an area of cacheable code

D. When it sets a software breakpoint

When developing a product using the standard ARM C library, what is the minimum effort required to re-target all platform-specific functions in the library?

A. Replace all functions which use semi-hosting

B. Locate the stack in an area of RAM

C. Set the locale variable appropriately

D. All functions in the standard library must be rewritten

Optimizing for space will:

A. Produce an image which is decompressed at run-time.

B. Cause the compiler to unroll loops where possible.

C. Result in more functions being inlined by the compiler.

D. Produce smaller code, even if this results in slower execution.